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The AVR 8-Bits Microcontrollers External Interrupts

Introduction to AVR External Interrupts


This AVR Tutorial looks at the AVR microcontroller external interrupts. The AVR microcontrollers has two categories of interrupts as indicated in the tutorial on the AVR 8-bits Microcontroller Interrupt Sub-system. They are internal and external interrupts. This tutorial focuses on the AVR 8-Bits Microcontroller's external interrupts. Specifically this AVR tutorial will focus on the external interrupts of the ATMega8515. It focus on the ATMega8515 so as to name specific registers. Other microcontrollers in the family might not have the same number of external interrupts and thus will have fewer registers associated with interrupts.

The ATMega8515 External Interrupts
There are four (4) external interrupts associated with Atmel's ATMega8515 AVR microcontroller. Namely: RESET, External Interrupt 0 (INT0), External Interrupt 1 (INT1) and External Interrupt 2 (INT2).The pins associated with these interrupts are shown in the figure below.

AVR ATMega8515 External Interrupt Pins

The ATMega8515 RESET interrupt is triggered when a low voltage (approximately 0V) is applied to reset pin. This cause the microcontroller to reset, that is reboot. As such the reset pin should be kept at or near the Vcc voltage for normal operation of your circuits.

The other three (3) hardware interrupts are triggered by events that can be configured using the I/O registers describe below. If any of these interrupts are enabled and triggered they are service by an Interrupt Service Routine (ISR) or Interrupt Handler which is written by the programmer. See the External Interrupt C Programming tutorial for an example on how this is done.

The AVR External Interrupts Associated I/O Registers
There are several I/O Registers that are associated with the external interrupt feature of the ATMega8515 microcontroller. These registers stores the interrupt flags, the interrupt enable bits, please see AVR 8-bits Microcontroller Interrupt Sub-system, along with control information for each of the external interrupts. These registers are describe below.


GIFR - General Interrupt Flag Register

The GIFR register contains the interrupt flags for all the ATMega8515 external interrupts. Each of these bit are set individually to logic 1 when the interrupt event for the specified interrupt occurs. Note that the flag bit of an interrupt is set, whether or not the interrupt is enabled, once the interrupt event occurs. See AVR 8-bits Microcontroller Interrupt Sub-system.

For the ATMega8515 only three bits of the GIFR are utilized the others are reserved:
Bit 7 - External Interrupt Flag 1 (INTF1),
Bit 6 - External Interrupt Flag 0 (INTF0) and
Bit 5 - External Interrupt Flag 2 (INTF2).


GICR - General Interrupt Control Register
AVR Microcontroller GICR Register
The GICR register contains the interrupt enabled bit for all the external interrupts of the ATMega8515. Writing a 1 to the specific location which represent the each interrupt will enable that interrupt.

Important: Apart from enabling a specific interrupt, Global Interrupts MUST be enabled for the microcontroller to react to the interrupt event.

The following lines of code will enable External Interrupt 0 as well as the Global Interrupts bit of the ATMega8515 in assembly:

	LDI	R16, 1<<INT0	// Load 0b10000000 into R16
	OUT	GICR, R16	// Enable External Interrupt 0 
 
	SEI			// Enable Global Interrupts

The following lines of code will enable External Interrupt 0 as well as the Global Interrupts bit of the ATMega8515 in C:

	GICR |= 1<<INT0;	// Enable External Interrupt 0
	sei();			// Enable Global Interrupt



MCUCR - MCU Control Register
AVR Microcontroller MCUCR Register
The MCUCR contains configuration bits which tells what signals will trigger INT0 and INT1. The tables below show the possible values to write to the ISCxy bits and what are the corresponding triggers that will set off an interrupt event.

Trigger Settings for External Interrupt 0 (INT0)
ISC01 ISC00 Trigger Event
0 0 Low Level
0 1 Any Logic Change
1 0 Falling Edge
1 1 Rising Edge
Trigger Settings for External Interrupt 1 (INT1)
ISC11 ISC10 Trigger Event
0 0 Low Level
0 1 Any Logic Change
1 0 Falling Edge
1 1 Rising Edge



Extentded - EMCUCR
AVR Microcontroller EMCUCR Register
In regards to ATMega8515 there is only one bit in the EMCUCR used for the external interrupts. Bit 0 - Interrupt Sense Control 2 (ISC2). This bit is use to configure what event triggers INT2. Writing a 1 to this location will trigger INT2 on a rising edge and a 0 will trigger INT2 on a falling edge.

AVR Tutorials hope this AVR interrupt tutorial was benificial to you and looks forward to your continued visit for all your microcontroller tutorial needs.